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AT86RF231
The RF port DC values depend on the operating state, refer to Section 7. “Operating Modes” on
page 33 . In TRX_OFF state, when the analog front-end is disabled (see Section 7.1.2.3
“TRX_OFF - Clock State” on page 35 ), the RF pins are pulled to ground, preventing a floating
voltage.
In transmit mode, a control loop provides a common-mode voltage of 0.9V. Transistor M0 is off,
allowing the PA to set the common-mode voltage. The common-mode capacitance at each pin
to ground shall be < 30 pF to ensure the stability of this common-mode feedback loop.
In receive mode, the RF port provides a low-impedance path to ground when transistor M0, see
Figure 1-2 on page 5 , pulls the inductor center tap to ground. A DC voltage drop of 20 mV
across the on-chip inductor can be measured at the RF pins.
1.2.3
1.2.4
Table 1-2.
Crystal Oscillator Pins
XTAL1, XTAL2
The pin XTAL1 is the input of the reference oscillator amplifier (XOSC), XTAL2 is the output. A
detailed description of the crystal oscillator setup and the related XTAL1/XTAL2 pin configura-
tion can be found in Section 9.6 “Crystal Oscillator (XOSC)” on page 116 .
When using an external clock reference signal, XTAL1 shall be used as input pin.
For further details, refer to Section 9.6.3 “External Reference Frequency Setup” on page 117 .
Analog Pin Summary
Analog Pin Behavior - DC values
Pin
RFP/RFN
XTAL1/ XTAL2
DVDD
AVDD
Values and Conditions
V DC = 0.9V (BUSY_TX)
V DC = 20 mV (receive states)
V DC = 0 mV (otherwise)
V DC = 0.9V at both pins
C PAR = 3 pF
V DC = 1.8V (all states, except SLEEP)
V DC = 0 mV (otherwise)
V DC = 1.8V (all states, except P_ON,
SLEEP, RESET, and TRX_OFF)
V DC = 0 mV (otherwise)
Comments
DC level at pins RFP/RFN for various transceiver states
AC coupling is required if an antenna with a DC path to ground is used.
Serial capacitance and capacitance of each pin to ground must be < 30 pF.
DC level at pins XTAL1/XTAL2 for various transceiver states
Parasitic capacitance (C PAR ) of the pins must be considered as additional
load capacitance to the crystal.
DC level at pin DVDD for various transceiver states
Supply pins (voltage regulator output) for the digital 1.8V voltage domain,
recommended bypass capacitor 1 μF.
DC level at pin AVDD for various transceiver states
Supply pin (voltage regulator output) for the analog 1.8V voltage domain,
recommended bypass capacitor 1 μF.
6
8111C–MCU Wireless–09/09
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